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N-CHANNEL 60V - 0.1 - 2A SOT-223 STripFETTM II POWER MOSFET
TYPE STN2NF06L
s s s s s
STN2NF06L
VDSS 60 V
RDS(on) <0.12
ID 2A
TYPICAL RDS(on) = 0.1 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED AVALANCHE RUGGED TECHNOLOGY LOW THRESHOLD DRIVE
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DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s DC MOTOR CONTROL (DISK DRIVES, etc.) s DC-DC & DC-AC CONVERTERS s SYNCHRONOUS RECTIFICATION SOT-223
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INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM(*) Ptot(1) dv/dt (2) EAS (3) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Storage Temperature Max. Operating Junction Temperature Value 60 60 16 2 1.2 8 3 8 6 200 -55 to 150 Unit V V V A A A W W/C V/ns mJ C C
(*) Pulse width limited by safe operating area.
(1) Related to Rthj -l
(2) ISD 2A, di/dt 100A/s, VDD V (BR)DSS, Tj TJMAX (3) Starting T j = 25 oC, ID = 2A, VDD = 30V
November 2002
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THERMAL DATA
Rthj-pcb Rthj-pcb Tl Thermal Resistance Junction-PCB(1 inch2 copper board) Thermal Resistance Junction-PCB (min. footprint) Maximum Lead Temperature For Soldering Purpose 50 90 260 C/W C/W C
ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating TC = 125C VGS = 16 V Min. 60 1 10 100 Typ. Max. Unit V A A nA
ON (*)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V VGS = 5 V ID = 250 A ID = 1 A ID = 1 A Min. 1 0.1 0.12 0.12 0.14 Typ. Max. Unit V
DYNAMIC
Symbol gfs (*) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions
VDS = 15 V ID = 1 A
Min.
Typ. 3 360 55 25
Max.
Unit S pF pF pF
VDS = 25V f = 1 MHz VGS = 0
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ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions ID = 1 A VDD = 30 V VGS = 4.5 V RG = 4.7 (Resistive Load, Figure 3) VDD= 48 V ID= 2 A VGS= 5 V Min. Typ. 10 20 5.6 1.2 2.6 7.6 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions ID = 1 A VDD = 30 V VGS = 4.5 V RG = 4.7, (Resistive Load, Figure 3) Min. Typ. 17 6 Max. Unit ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (*) VSD (*) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 2 A VGS = 0 28 31 2.2 Test Conditions Min. Typ. Max. 2 8 1.3 Unit A A V ns nC A
ISD = 2 A di/dt = 100A/s Tj = 150C VDD = 20 V (see test circuit, Figure 5)
(*)Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (*)Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedance Junction-lead
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Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature
Source-drain Diode Forward Characteristics
Normalized Breakdown Voltage vs Temperature.
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Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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SOT-223 MECHANICAL DATA
mm MIN. a b c d e1 e4 f g l1 l2 L 2.9 0.67 6.7 3.5 6.3 3 0.7 7 3.5 6.5 2.27 4.57 0.2 0.63 1.5 TYP. 2.3 4.6 0.4 0.65 1.6 MAX. 2.33 4.63 0.6 0.67 1.7 0.32 3.1 0.73 7.3 3.7 6.7 114.2 26.4 263.8 137.8 248 118.1 27.6 275.6 137.8 255.9 MIN. 89.4 179.9 7.9 24.8 59.1 mils TYP. 90.6 181.1 15.7 25.6 63 MAX. 91.7 182.3 23.6 26.4 66.9 12.6 122.1 28.7 287.4 145.7 263.8
DIM.
L
l2
e1
a b f
d c e4
C
l1
B
C
E
g
P008B
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (R) 2002 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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